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Chips & Deep Techabout 3 hours ago

TPU 8tx targets confidential inference; 8i Max expands bandwidth

By Jey Geethan

Google announced two eighth-generation TPU systems on November 9, 2026. TPU 8tx pairs existing 8t silicon with a confidential-computing design; 8i Max packages two 8i chips for higher listed compute and memory bandwidth. The announcement gives no availability date or independent results for the new systems.

Three pale ceramic tiles: one inside a translucent sleeve, two joined by a curved clear bridge.

Google announced TPU 8tx and TPU 8i Max on November 9, 2026. These are two new systems built around its existing eighth-generation 8t and 8i chips, not two newly designed chips. The changes concern the host and network around 8t, and the package and memory resources around 8i.

For operators, that distinction matters. A system design can change security boundaries and the resources available to a workload without changing the underlying silicon. Google has described the intended designs, but has not given buyers an availability date or independent results for either new system.

What TPU 8tx changes

TPU 8tx uses the same silicon as TPU 8t, paired with fifth-generation AMD EPYC CPU hosts and Google’s Boardfly network. Google says the hardware design is intended to keep sensitive data and model weights protected and isolated during active processing. This is a company claim about its confidential-computing design, not a published third-party security assessment.

Google claims up to a twofold reduction in latency compared with TPU 8t for the 8tx configuration. Its announcement does not provide the workload, system topology or measurement method behind that comparison. Teams handling regulated or proprietary data will also need documentation on attestation, key management and isolation boundaries before relying on the confidentiality claim in a production threat model.

Why TPU 8i Max uses two chips

For TPU 8i Max, Google combines two existing 8i chips in one package. In its technical description, the company says this doubles compute, SRAM and high-bandwidth memory (HBM) bandwidth compared with TPU 8i while fitting twice the silicon within the existing rack footprint. The design targets workloads in which memory bandwidth and communication can constrain large-context processing.

These are stated hardware resources, not proof that a model will run with twice the context length or twice the application throughput. The announcement does not give a system-specific independent benchmark or enough workload detail to make that inference.

What operators can verify today

Google’s announcement does not state a general availability date, price or deployment regions for TPU 8tx or TPU 8i Max. It separately says Cloud Pathways and GKE dynamic slicing are generally available, but those are software announcements and do not establish access to either new TPU system.

The next useful checks are access terms and regions, a documented trust model for 8tx, and workload-level latency and memory results for 8i Max. Until those details are published, the announcement describes two system designs rather than a deployment specification.

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