Chips & Deep Tech

Semiconductors, quantum computing, robotics, AR/VR, hardware R&D, and frontier tech.

Chips & Deep Tech11 days ago

Microsoft details Maia 300's 96-accelerator rack for 2027

Microsoft specifies 288 GB of HBM4 and 18 TB/s peak bandwidth per accelerator in a 167 kW rack design. Its token-throughput gains are company claims, with deployment planned for 2027.

Read article

Chips & Deep Techabout 1 month ago

Nexperia and Tata Set Framework for MOSFET Production in India

The partnership could connect wafer fabrication in Dholera with assembly and testing in Jagiroad, but neither company has disclosed production dates, volumes, process nodes, or qualification milestones.

Read article

Chips & Deep Techabout 1 month ago

MediaTek’s 2nm Dimensity 9600 Pro Uses Arm C2 Cores and Dual NPUs

The flagship mobile SoC combines an eight-core Arm C2 CPU, dual NPUs, LPDDR6 and UFS 5.0 support, but its performance and efficiency figures come from MediaTek demo-device tests and shipping phones remain unnamed.

Read article

Chips & Deep Techabout 2 months ago

ASML and TSMC set a roadmap for larger High NA EUV masks

The initiative targets a mask pilot line in 2031 and system readiness in 2033. Earlier High NA adoption plans run on a separate timetable.

Read article

Chips & Deep Techabout 2 months ago

Microduck opens its runtime and sim-to-real training stack

Pollen Robotics has opened pre-orders for the 25 cm Microduck at an introductory $399 before taxes and shipping, while publishing its runtime and reinforcement-learning training repositories under Apache 2.0. The practical value is an inspectable sim-to-real workflow, not an independently proven leap in robot capability.

Read article

Chips & Deep Techabout 2 months ago

AWS Plans 2 Million More NVIDIA GPUs Alongside Trainium

AWS plans to deploy 2 million additional NVIDIA GPUs in 2027 and 2028 while deepening Trainium integration, a bet on workload choice rather than one-chip standardization.

Read article

Chips & Deep Tech3 months ago

DEF CON 34 Badge Debuts a Mostly Open-Source RISC-V Chip

DEF CON 34's electronic badge uses Baochip-1x, a mostly open-source RISC-V chip whose published software and hardware design can be examined alongside its physical die.

Read article

Chips & Deep Tech3 months ago

Samsung-Broadcom MOU Estimates $200B-Plus Chip Collaboration

The five-year plan spans HBM for future Broadcom AI accelerators, Samsung 2nm-and-below foundry work, and 2.3D/2.5D packaging—but it does not disclose binding orders, volumes or delivery schedules.

Read article

Chips & Deep Tech4 months ago

Google TPU Paper Shows AI Supercomputers Are Becoming Systems Projects

A new Google-authored paper traces TPU v2 to Ironwood and shows why AI accelerator gains now depend on memory, networks, resilience, and power efficiency, not just faster chips.

Read article

Chips & Deep Tech4 months ago

Stathera's $55M Raise Puts Silicon Timing Into AI Data Centers

The Montreal startup is scaling MEMS-based timing chips as AI clusters make synchronization a harder infrastructure problem.

Read article

Chips & Deep Tech4 months ago

Onsemi's $7B Synaptics Deal Pushes Physical AI to the Edge

Onsemi plans to buy Synaptics in a roughly $7 billion all-stock deal, aiming to combine power, sensing, connectivity, and edge AI for physical systems.

Read article

Chips & Deep Tech5 months ago

Quantum Computing Is Crypto’s Next Big Security Test

Quantum computers cannot break crypto today, but Bitcoin, Ethereum, XRP Ledger, wallets and exchanges are already preparing for post-quantum security.

Read article